SSRG - IJVSP - Volume 2 Issue 2 - May - August 2015

S.No Title/Author Name Paper ID
1
Optimizing the Modified Booth Recoder for Fused Add-Multiply Operator
- Manju Mallayagari and G. Sahithi Reddy
IJVSP-V2I2P101
2
FPGA Implementation of Simple and High Speed Vedic Multiplier
- Shilpi Thawait and Jagveer Verma
IJVSP-V2I2P102
3
A Review Paper on 2D to 3D Face Recognition Technology
- Vinita Bhandiwad
IJVSP-V2I2P103
4
Analysis and Optimization of Power Consumption and Area of Domino Full Adder
- B. Krishna Naga Deepthi and Dr.M.V.Subramanyam
IJVSP-V2I2P104
5
Recent Trends in the Hybrid HVDC with Wind Energy a Solution to the Problem and Challenges
- Dr. Hadadi Sudheendra, Mr Tefera Mekonnen and Mr Melaku
IJVSP-V2I2P105
6
Design and Construction of a Tri-Sensor Temperature Control System
- Ogherohwo E.P. Barnabas .B . and Anyanwu V. O
IJVSP-V2I2P106
7
A Comparative Study of Vision Guided AUV Navigation Techniques for Pipeline/Cable Inspection
- Alex Raj S.M , Aruna S. Rajan and Supriya M. H
IJVSP-V2I2P107
8
Layout Design, Analysis and Implementation of Combinational and Sequential Circuits using Microwind
- Ms.Amrita Pahadia and Dr. Uma Rathore Bhatt
IJVSP-V2I2P108