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SSRG - IJVSP - Volume 3 Issue 2 - May - August 2016

S.No Title/Author Name Paper ID
1
Design of Robust and power Efficient 8-Bit Ripple Carry Adder using Different Logic Styles
- Mangayarkkarasi M and Joseph Gladwin S
IJVSP-V3I2P101
2
Design of a CMOS Multiplexer with Ultra Low Power using Current Mode Logic Technology
- Dr.R.Carlo Novara and Mohamed Djemai
IJVSP-V3I2P102
3
Aninnovative Method in Designing Multiprocessor using Multi-Threading Techniques
- Youmin Zhang and Joaquim Blesa
IJVSP-V3I2P103
4
Analysis and Optimization of a Floating Point Representation of a Complex Numbers using FPGA
- Dr.A.Nitesh and J.Deveesh
IJVSP-V3I2P104
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