SSRG - IJVSP - Volume 4 Issue 1 - January - April 2017
| S.No | Title/Author Name | Paper ID |
|---|---|---|
| 1 |
Distortion Monitored Rate Allocation for Video
|
IJVSP-V4I1P101 |
| 2 |
Design of 2 GHz Integrator using Feedforward-Regulated Cascode Operational Transconductance Amplifier
|
IJVSP-V4I1P102 |
| 3 |
Design of Second Order Adiabatic Logic for Energy Dissipation in VLSI CMOS Circuits
|
IJVSP-V4I1P103 |
| 4 |
Realisation of Vedic sutras for multiplication in Verilog
|
IJVSP-V4I1P104 |