Hybrid Multilevel Inverter with Reduced Switches and Harmonics

International Journal of Electrical and Electronics Engineering
© 2016 by SSRG - IJEEE Journal
Volume 3 Issue 3
Year of Publication : 2016
Authors : Dr.C.B.Venkataramanan, Pranesh V
: 10.14445/23488379/IJEEE-V3I3P102
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Citation:
MLA Style:

Dr.C.B.Venkataramanan, Pranesh V, "Paper Title" SSRG International Journal of Electrical and Electronics Engineering 3.3 (2016): 10-15.

APA Style:

Dr.C.B.Venkataramanan, Pranesh V,(2016). Paper Title. SSRG International Journal of Electrical and Electronics Engineering 3(3), 10-15.

Abstract:

 In this project mainly focused on the design and implementation of new topology in a 63 level Hybrid multilevel inverter by using only a 9 switches. The main merit of the new topology is to reduce the lower total harmonic distortion, lower electromagnetic interference generation and high output voltage. In this project, POD carrier pulse width modulation technique is proposed, which can minimize the total harmonic distortion and enhances the output voltages from proposed work of five level inverter. From the hardware and simulation we can justified that the new topology can be recommended to single phase inverter for better performance in comparison with conventional method. The simulation is done by Mat Lab 2010 version software.

References:

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Key Words:

Hybrid multilevel inverter; phase opposition and disposition; harmonics; power electronics devices.