SSRG - IJVSP - Volume 4 Issue 1 - January - April 2017

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S.No Title/Author Name Paper ID
1
Distortion Monitored Rate Allocation for Video
- Fairooz SK and Dr.Madhavi B.K
IJVSP-V4I1P101
2
Design of 2 GHz Integrator using Feedforward-Regulated Cascode Operational Transconductance Amplifier
- Akhtara Afsana Ahmed, Ziree Ziree Daimary, Nirmal Rai, Rochan Banstola, Suman Das, Surya Prakash Tamang
IJVSP-V4I1P102
3
Design of Second Order Adiabatic Logic for Energy Dissipation in VLSI CMOS Circuits
- Sudhakar Alluri, B.Rajendra Naik and N.S.S.Reddy
IJVSP-V4I1P103
4
Realisation of Vedic sutras for multiplication in Verilog
- A. Kamaraj, A. Daisy Parimalah and V. Priyadharshini
IJVSP-V4I1P104