Reliability Evaluation of NLDMOS Transistor Based on Advanced Aging Test Including Hot Carrier Phenomenon
|International Journal of Electronics and Communication Engineering|
|© 2022 by SSRG - IJECE Journal|
|Volume 9 Issue 8|
|Year of Publication : 2022|
|Authors : Mohamed Ali Belaid|
How to Cite?
Mohamed Ali Belaid, "Reliability Evaluation of NLDMOS Transistor Based on Advanced Aging Test Including Hot Carrier Phenomenon," SSRG International Journal of Electronics and Communication Engineering, vol. 9, no. 8, pp. 1-7, 2022. Crossref, https://doi.org/10.14445/23488549/IJECE-V9I8P101
This manuscript treats the relative performance analysis of the hot carrier persuaded electrical behavior failure in RF power NLDMOS components afterward innovative procedures of accelerated aging tests under various conditions (electrical and thermal stress). The results show the performances shift for critical electrical parameters such as the Miller Crss capacitance and the Cgd gate-drain capacitance under various aging tests. To understand the parameter shift that appears during aging, we used a new electro-thermal perfect model executed by Agilent’s Advanced Design System (ADS) software as a reliability tool beneath form SDD, meaning Symbolic Defined Device, also with a physical numerical simulation (2D Silvaco-Atlas software) to prove qualitatively degradation phenomena, which are resulted through the generation of interface state also stuck electrons, then outcomes in a buildup at Si/SiO2 border of negative. charge.
Reliability, characterization, LDMOS, thermal effects, hot carrier phenomenon.
 S. Zhou and J. Wang, “An Rf Stress-Based Thermal Shock Test Method for A Cmos Power Amplifier”, Electron Devices Society, Vol.9, Pp. 1024-1029, 2021.
 Nayak, P., Pramanick, S.K., Rajashekara, K, “A High Temperature Gate Driver for Silicon Carbide Mosfet”, Ieee Trans. Ind. Electron., Vol. 65, Pp. 1955–1964, 2018.
 M.A. Belaïd, K. Ketata, M. Gares Et Al., “Analysis and Simulation of Self-Heating Effects on Rf Ldmos Devices”, Proc. Ieee Conf. Simulation of Semiconductor Processes and Devices, Sispad 2005, Tokyo, Japan, Pp. 231–234, 2005.
 C. Kun-Ming Et Al, “Characterization and Modelling of Soi Varactors At Various Temperatures”, Ieee Trans. Ele. Devi, Vol. 51, Pp. 415-420, 2004.
 M. A. Belaid, “Symptom Reliability: S-Parameters Evaluation of Power Mosfet After Pulsed-Rf Life Tests for A Radar Application,” Iet Circuits Devices Syst., Vol. 12, Pp. 571-578, 2018.
 Product News From Philips Semiconductors, “Ldmos Devices to Boost Base Station Efficiency” , 2003.
 Pedro J. Escalona-Cruz, Manuel A. Jimenez-Cedeno, “Automated Rdson Characterization for Power Mosfets, Ieee Conf,” Latin American Symposium on Circuits & Systems Lascas 2015, Montetevideo, Uruguay, Pp. 1-4, 2015.
 Nasser Badawi, Oliver Hilt, Eldad Bahat-Treidel, “Investigation of the Dynamic on-State Resistance of 600 V Normally-Off and Normally-on Gan Hemts,” Ieee Transactions on Industry Applications, Vol.52, Pp. 4955-4964, 2016.
 M. Saremi, M. Saremi, H. Niazi, M. Saremi and A. Yazdanpanah, “Soi Ldmosfet With Up and Down Extended Stepped Drift Region,” Journal of Electronic Materials, Vol.46, Pp. 5570-5576, 2017.
 Ali A. Orouji, S.E. Jamali Mahabadi, P. Keshavarzi, “A Novel Partial Soi Ldmosfet With aTrench and Buried P Layer for Breakdown Voltage Improvement,” Microelectronic Reliability , Vol.50, Pp. 449-460, 2011.
 Li-Sheng Wang, Jing-Ping Xu, Lu Liu, Et Al., “Influences of Remote Coulomb and Interface-Roughness Scatterings on Electron Mobility of Ingaas Nmosfet With High-K Stacked Gate Dielectric”, Ieee Transactions on Nanotechnology, Pp. 854–861, 2015.
 I. Cortes, J. Roig, D. Flores, J. Urresti, S. Hidalgo, "Analysis of Hot-Carrier Degradation in A Soi Ldmos Transistor With A Steep Retrograde Drift Doping Profile", Elsevier Microelectronics Reliability, , Vol.45, Pp. 493-498, 2004.
 M.A. Belaïd Et Al., “2-D Simulation and Analysis of Temperature Effects on Electrical Parameters Degradation of Power Rf Ldmos Device”, Nim B Journal, Vol. 253, Pp. 250–254, 2006.
 Ph. Kouakou, "Physical Study of Nonlinearities in Radio Frequency Mos Transistors", Phd Thesis, University Paul Sabatier of Toulouse, June 1999.
 C. Ying, H. Zhou, H. Mo, Et Al, “Optimization of Rf Performance and Reliability of 28v Rf-Ldmos,” Ieee Conf. China Semiconductor Technology International Conference, Cstic 2019, Shanghai, China, Pp.19-23, 2019.
 G. Groesenken Et Al, “Temperature Dependence of Threshold Voltage in Thin-Film So1 Mosfet’s,” Ieee Electron Device Lett, , Vol.11, Pp. 329-332, 1990.
 M. Miller, T. Dinh, E. Shumate, "A New Empirical Large Signal Model for Silicon Rf Ldmosfet’s,” Ieee Mtt-S Technol. Wireless Applicat, Dig. , Vol. Pp. 19-22, 1997.
 M.A. Belaïd, K. Ketata, M. Gares, M. Masmoudi, J. Marcon, "Reliability Study of Power Rf Ldmos Device Under Thermal Stress", Microelectr. Journal, Vol.38, Pp. 164–170, 2006.
 Siyang Liu, Sheng Li, Zhichao Li Et Al. “Lateral Dmos With Partial-Resist-Implanted Drift Region for Alleviating Hot-Carrier Effect”, Ieee Transactions on Device and Materials Reliability, , Vol.99, Pp. 780-784, 2017.
 Chien-Yu Lin, Ting-Chang Chang, Kuan-Ju Liu, “Analysis of Contrasting Degradation Behaviors in Channel and Drift Regions Under Hot Carrier Stress in Pdsoi Ld N-Channel Mosfets”, Ieee Electron Device Letters, Vol.38, Pp. 705-707, 2017.
 Takahiro Iizuka; Et Al., “Validation on Duality in Impact-Ionization Carrier Generation at the Onset of Snapback in Power Mosfets,” Ieee Conf. Isdcs 2019, Higashi-Hiroshima, Japan, Pp. 516-520.