A Chirality Based Noise Margin Analysis of Carbon Nanotube FET Devices

International Journal of Electrical and Electronics Engineering

© 2020 by SSRG - IJEEE Journal

Volume 7 Issue 7

Year of Publication : 2020

Authors : Hasin Akhyear, Ashiqure Rashid, Showmik Singha

10.14445/23488379/IJEEE-V7I7P109

How to Cite?

Hasin Akhyear, Ashiqure Rashid, Showmik Singha, "A Chirality Based Noise Margin Analysis of Carbon Nanotube FET Devices," SSRG International Journal of Electrical and Electronics Engineering, vol. 7,  no. 7, pp. 51-56, 2020. Crossref, https://doi.org/10.14445/23488379/IJEEE-V7I7P109

Abstract:

Carbon nanotubes have shown great promises in the field of nano-electronic devices by the enhancement of overall performance matrices compared to traditional silicon-based devices. The goal of this paper is to seek for ways how to influence the performance of digital devices by varying the property of the carbon nanotubes. Our work focuses on the chiral property of the nanotubes and its impact on the noise margin of the inverter. We have designed a 6T SRAM to analyze the relation between N-curve stability parameters and the chirality of the channel. Simulation and analysis using CNTFET show promising results in enhancing the robustness and stability of digital devices.

Keywords:

CNTFET, chirality, threshold voltage, noise margin, SRAM, N-curve.

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