Minimal Realizations of Logic Functions

International Journal of Electronics and Communication Engineering
© 2021 by SSRG - IJECE Journal
Volume 8 Issue 1
Year of Publication : 2021
Authors : T S Rathore
How to Cite?

T S Rathore, "Minimal Realizations of Logic Functions," SSRG International Journal of Electronics and Communication Engineering, vol. 8,  no. 1, pp. 24-27, 2021. Crossref,


In the conventional method, a truth table (TT) is prepared from the specified logic function. Then it is expressed as the sum of minterms corresponding to the rows in which 1 appears. Finally, this function is further reduced using the Boolean identities. Thus, all the simplifications are concentrated at one place after the TT. This procedure does not always lead to minimal realization. This paper deals with the minimal realization of the logic function using TT in which TT is reduced successively by one variable at a time till all the variables are exhausted. Instead, the simplification is carried out at the end of the TT at the end of each step of TT reduction. The method is shown to be systematic and leads to minimal function. It is simpler in operation than based on only Boolean identities, Karnaugh map, and Quine-McClusky methods and can handle any number of variables. It is explained with several examples. It is worth introducing as an improvement over the classical TT method in classroom teaching.


Minimal Realizations, Logic Functions, Truth Table Method, Digital Circuits


[1] Z. Kohavi, Switching, and Finite Automata Theory, Tata McGraw-Hill, New Delhi,(1978).
[2] E. W. Veitch, A chart method for simplifying truth functions, Proc ACM, Pittsburgh, May 2-3(1952)127-133,
[3] M. Karnaugh, The map method for synthesizing combinational logic circuits, Trans AIEE, Pt 1, 72(9)(1953) 593-599.
[4] W. V. Quine, The problem of simplifying truth functions, Am. Math. Monthly, 59(8)(1952) 521-531,
[5] W. V. Quine, A way to simplify truth functions, Am. Math. Monthly, 62(9)(1955) 627-631.
[6] E. J. McCluskey Jr, Minimization of Boolean functions, Bell System Tech, J., 35(6)(1956) 1417-1444.
[7] T. C. Bartee, Computer design of multiple output logical networks, IRE Trans. Electron. Computers, EC-10(1)(1961) 21-30.
[8] E. J. McCluskey and H Schorr, Essential multiple-output prime implicates, in Mathematical Theory of Automata, Proc. Polytech. 1st. Brooklyn Symp., 12(1)(1962) 437-457.
[9] B. Harbort and B. Brown, Karnaugh maps, Computer Science Department, Southern Polytechnic University, (2001).
[10] T. A. Scott, An Algorithm for simplifying Boolean functions, The University of Northern Colorado,13(1998).
[11] S. Nowick, The Quine McCluskey method, CSEE W4861y, 19, (2006).
[12], December 26(2010).
[13] N. Outram, Petrick’s method, School of Computing and Mathematics, University of Plymouth UK, (2010).
[14] A. Dusa, Enhancing Quine-Mccluskey, University of Bucharest, September 17,(2010).
[15] N. Sarkar, K. Petrus, and H. Hossain, Software implementation of Quine-Mccluskey algorithm for logic gate minimization, Department of computer science, Auckland University of Technology, (2001).
[16] T. S. Rathore, Minimal realizations of logic functions using truth table method with distributed simplification, IETE J. Education, 55(1)(2014) 26-32.
[17] V. C. Prasad, Generalized Karnaugh map method for boolean functions of many variables, IETE J. of Education,(2017).
[18] T. S. Rathore and K. S. Sanila, A comparison of two methods for realizing the minimal function of several logic variables,8(1)(2021) 6-10.