New Generation of Innovative Power gating on Embedded Systems

International Journal of Electronics and Communication Engineering

© 2015 by SSRG - IJECE Journal

Volume 2 Issue 3

Year of Publication : 2015

Authors : K.Vinoth and V.M.Padmapriya

10.14445/23488549/IJECE-V2I3P105

How to Cite?

K.Vinoth and V.M.Padmapriya, "New Generation of Innovative Power gating on Embedded Systems," SSRG International Journal of Electronics and Communication Engineering, vol. 2,  no. 3, pp. 1-6, 2015. Crossref, https://doi.org/10.14445/23488549/IJECE-V2I3P105

Abstract:

Multithreshold CMOS power gating is very effective for reducing static leakage power during long periods of inactivity. Power-gating method was used to provide multiple poweroffmodes and reduce the leakage power during short periods ofinactivity. This scheme can suffer from high sensitivityto process variations of logic. Wepropose a new power-gating technique that is tolerant to processvariations and scalable to more than three intermediate power-offmodes. The proposed design requires less design effort and provide large power reduction and smaller area cost than the previousmethod. In addition, it will be combined with existing methods to offer further static power reduction. Analysis andextensive simulation results demonstrate the effectiveness of the proposed design

Keywords:

multi-mode power switches, power consumption reduction, process variation, reconfigurable power-gating structure

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