A Fast FPGA-Based Implementation of Linear and Non-Linear Image Filters

International Journal of Electronics and Communication Engineering

© 2025 by SSRG - IJECE Journal

Volume 12 Issue 5

Year of Publication : 2025

Authors : Riddhesh Veling, Aditya Vishwakarma, Shreyash Tiwari, Ravindra Chaudhari

10.14445/23488549/IJECE-V12I5P109

How to Cite?

Riddhesh Veling, Aditya Vishwakarma, Shreyash Tiwari, Ravindra Chaudhari, "A Fast FPGA-Based Implementation of Linear and Non-Linear Image Filters," SSRG International Journal of Electronics and Communication Engineering, vol. 12,  no. 5, pp. 108-117, 2025. Crossref, https://doi.org/10.14445/23488549/IJECE-V12I5P109

Abstract:

Real-time image processing plays a crucial role in various domains, including medical imaging, surveillance, and autonomous systems, where the demand for efficient hardware acceleration is paramount. Field-Programmable Gate Arrays (FPGAs) emerge as a viable solution owing to their ability to perform parallel processing and their low-latency characteristics. This study introduces an FPGA-based implementation of both linear and non-linear image filters that are specifically optimized for real-time applications. The methodology employs a coefficient file (.coe) generation technique to facilitate efficient sum-of-product calculations and swift pixel ordering within a 3×3 window, all executed within a single clock cycle. The design, implemented on a Basys-3 FPGA using Verilog HDL and synthesized in Xilinx Vivado, achieves a processing latency of 0.04 ms at a clock frequency of 464 MHz while deliberately avoiding the utilization of FPGA DSP blocks. The paper provides a comprehensive account of the methodology to ensure reproducibility, detailing preprocessing steps, data management, and the experimental framework. The results indicate that the proposed architecture enhances computational efficiency without compromising image quality, thereby making it highly suitable for real-time applications in FPGA-based image processing.

Keywords:

Digital signal processing, Field-programmable gate arrays, Image enhancement, Linear filters, Non-linear filters.

References:

[1] Karan Kumar, Aditya Jain, and Atul Kumar Srivastava, “FPGA Implementation of Image Enhancement Techniques,” Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2009, Wilga, Poland, vol. 7502, pp. 1-10, 2009.
[CrossRef] [Google Scholar] [Publisher Link]
[2] S.O. Nirmala, T.D. Dongale, and R.K. Kamat, “Review on Image Enhancement Techniques: FPGA Implementation Perspective,” International Journal of Electronics Communication and Computer Technology, vol. 2, no. 6, pp. 1-9, 2012.
[Google Scholar] [Publisher Link]
[3] Sagar Patel et al., “Image Enhancement on FPGA Using Verilog,” International Journal of Technical Innovation in Modern Engineering & Science, vol. 5, no. 3, pp. 2455-2585, 2019.
[Google Scholar] [Publisher Link]
[4] Muhammed Yildirim, and Ahmet Çinar, “Simultaneously Realization of Image Enhancement Techniques on Real-Time FPGA,” 2019 International Artificial Intelligence and Data Processing Symposium, Malatya, Turkey, pp. 1-6, 2019.
[CrossRef] [Google Scholar] [Publisher Link]
[5] B.H. Ramyashree, R. Vidhya, and D.K. Manu, “FPGA Implementation of Contrast Stretching for Image Enhancement Using System Generator,” 2015 Annual IEEE India Conference, New Delhi, India, pp. 1-6, 2015.
[CrossRef] [Google Scholar] [Publisher Link]
[6] Rahul Shandilya, and R.K. Sharma, “FPGA Implementation of Image Enhancement Technique for Automatic Vehicles Number Plate Detection,” 2017 International Conference on Trends in Electronics and Informatics, Tirunelveli, India, pp. 1-5, 2017.
[CrossRef] [Google Scholar] [Publisher Link]
[7] Mandeep Singh Narula, and Nishant Singla, “FPGA Implementation of Image Enhancement Using Verilog HDL,” International Research Journal of Engineering and Technology, vol. 5, no. 5, pp. 1794-1797, 2018.
[Google Scholar] [Publisher Link]
[8] Mohammad I. AlAli, Khaldoon M. Mhaidat, and Inad A. Aljarrah, “Implementing Image Processing Algorithms in FPGA Hardware,” 2013 IEEE Jordan Conference on Applied Electrical Engineering and Computing Technologies, Amman, Jordan, pp. 1-5, 2013.
[CrossRef] [Google Scholar] [Publisher Link]
[9] S. Sowmya, and Roy Paily, “FPGA Implementation of Image Enhancement Algorithms,” 2011 International Conference on Communications and Signal Processing, Kerala, India, pp. 584-588, 2011.
[CrossRef] [Google Scholar] [Publisher Link]
[10] Narayan A. Badiger et al., “FPGA Implementation of Image Enhancement Using Verilog HDL,” International Research Journal of Engineering and Technology, vol. 7, no. 6, pp. 5663- 5668, 2020.
[Google Scholar] [Publisher Link]
[11] Zdenek Vasicek, Michal Bidlo, and Lukas Sekanina, “Evolution of Efficient Real-Time Non-Linear Image Filters for FPGAs,” Soft Computing, vol. 17, pp. 2163-2180, 2013.
[CrossRef] [Google Scholar] [Publisher Link]
[12] C.K. Priyanka, “Median Filter Algorithm Implementation on FPGA for Restoration of Retina Images,” International Journal of Innovative Science, Engineering & Technology, vol. 3, no. 5, pp. 415-420, 2016.
[Google Scholar] [Publisher Link]
[13] Kaushal Kumar, Ritesh Kumar Mishra, and Durgesh Nandan, “Efficient Hardware of RGB to Gray Conversion Realized on FPGA and ASIC,” Procedia Computer Science, vol. 171, pp. 2008-2015, 2020.
[CrossRef] [Google Scholar] [Publisher Link]
[14] R. Dhanabal et al., FPGA Based Image Processing Unit,” 2015 IEEE 9th International Conference on Intelligent Systems and Control, Coimbatore, India, pp. 1-4, 2015.
[CrossRef] [Google Scholar] [Publisher Link]
[15] Ghassan Mahmoud Husien Amer, and Ahmed Mohamed Abushaala, “Edge Detection Methods,” 2015 2nd World Symposium on Web Applications and Networking, Sousse, Tunisia, pp. 1-7, 2015.
[CrossRef] [Google Scholar] [Publisher Link]
[16] Girish Chaple, and R.D. Daruwala, “Design of Sobel Operator Based Image Edge Detection Algorithm on FPGA,” 2014 International Conference on Communication and Signal Processing, Melmaruvathur, India, pp. 788-792, 2014.
[CrossRef] [Google Scholar] [Publisher Link]
[17] Zhang Jin-Yu, Chen Yan, and Huang Xian-Xiang, “Edge Detection of Images Based on Improved Sobel Operator and Genetic Algorithms,” 2009 International Conference on Image Analysis and Signal Processing, Linhai, China, pp. 31-35, 2009.
[CrossRef] [Google Scholar] [Publisher Link]
[18] James Coady et al., “An Overview of Popular Digital Image Processing Filtering Operations,” 2019 13th International Conference on Sensing Technology, Sydney, NSW, Australia, pp. 1-5, 2019.
[CrossRef] [Google Scholar] [Publisher Link]
[19] Tarek M. Bittibssi et al., “Image Enhancement Algorithms Using FPGA,” International Journal of Computer Science and Communication Networks, vol. 2, no. 4, pp. 536-542, 2012.
[Google Scholar]