Design and Analysis of Improved Raptor Encoder-based Hybrid Recursive Systematic Convolutional Encoding Technique for 6G Networks

International Journal of Electrical and Electronics Engineering
© 2022 by SSRG - IJEEE Journal
Volume 9 Issue 11
Year of Publication : 2022
Authors : Dasari Ramanna, Ganesan V
How to Cite?

Dasari Ramanna, Ganesan V, "Design and Analysis of Improved Raptor Encoder-based Hybrid Recursive Systematic Convolutional Encoding Technique for 6G Networks," SSRG International Journal of Electrical and Electronics Engineering, vol. 9,  no. 11, pp. 11-16, 2022. Crossref,


In modern years, 6G is the upcoming technology suitable for many applications such as autonomous vehicles, augmented and virtual reality, virtual video conferences, holographic beamforming, cell-free communication, unmanned aerial communication, and quantum communication. The 6G application represented required large bandwidth, high data rate, throughput, increased network capacity, and low latency may be obtained by employing Non-Orthogonal Multiple Access techniques (NOMA). It will be obtained by choosing the appropriate error correction encoding and decoding method. So, we proposed an improved raptor encoder-based hybrid Recursive and Non-Recursive Systematic Convolutional Encoding techniques for 6G networks. Here, the raptor encoder method initially consists of a serial connection of polar code and LowDensity Parity Check (LDPC). The LDPC encoded data are multiplexed with the original bit to produce the raptor code word. The raptor code word is fed as input to Recursive Systematic Convolutional (RSC) Encoder technique, which results in fewer code words with lesser weight and better error performance. The proposed encoding process also connects the raptor code and RSC code in parallel form to produce the turbo code. Here, different types of interleaver are designed and connected parallel with Raptor and RSC code to reduce the data bit error rate and achieve a larger channel capacity. Finally, the proposed raptor and RSC-based hybrid encoding process was implemented using different FPGAs such as Vertex 4, Vertex 5 and Vertex 6 and obtained better power, latency, Number of LUTs, product area, time delay, throughput, PSNR and code gain. From the simulation results, it is inferred that the proposed hybrid encoder technique obtained greater throughput and a lesser Bit Error Rate.


Raptor Code, Polar Code, Low-Density Parity Check, Recursive Systematic Convolutional Encoder, NonOrthogonal Multiple Access, 6G Networks, Turbo Code, Interleaver.


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